The present invention generally pertains to the field of consumer electronic devices. More particularly, the present invention is related to a consumer electronics device having a single main system microprocessor.
Due, in part, to the rapid development of semiconductor and VLSI (very large-scale integrated circuit) technologies in recent years, consumer electronics products have become increasingly popular. These now popular consumer electronics products include, for example, televisions (TVs), high definition televisions (HDTV), digital video disc (DVD) players, and the like. In addition to gaining popularity, such devices are also becoming increasingly technologically advanced. For example, Prior Art FIG. 1, illustrates several of the advanced components found in a conventional HDTV system 100. As shown in Prior Art FIG. 1, HDTV system 100 includes a system processor 102 which is coupled to and which controls five separate sub-microprocessors sub micro 104, sub micro 106, sub micro 108, sub micro 110, and sub micro 112. Each of the five sub micros 104, 106, 108, 110 and 112 controls numerous other HDTV components. For example, sub micro 104 controls tuner operation including tuner components 114. Similarly, sub micro 106 controls HDTV monitor deflection operation via components 116. Sub micro 108 controls on-screen display (OSD) functions with OSD device 118. Additionally, sub micro 110 controls multi-image drivers (MID) with components 120. Furthermore, sub micro 112 controls MUSE (Japanese HDTV standard) functions with components 122. It will also be seen from Prior Art FIG. 1, that various other components (e.g. audio/video switches component 124, audio/video processors component 126, chroma decoders component 128, and auto-wide component 130) are coupled to system microprocessor 102 via bus line 132 without an intermediary controlling sub-microprocessor.
The conventional multi-processor architecture of Prior Art FIG. 1 has several disadvantages associated therewith. Such disadvantages include, for example, substantial design complexity and increased costs resulting from the use of multiple microprocessors. Thus, some attempt has been made to design a consumer electronics product (e.g. a TV, an HDTV, a DVD, and the like) using only a single controlling microprocessor. Such a single microprocessor-controlled system not only reduces the system complexity and cost, but also increases the integration of system control functions. However, prior art single microprocessor-controlled systems often demand a powerful system microprocessor with a very strong driving capability. The requirement for a microprocessor with a very strong driving capability necessitates the use of a more powerful, and correspondingly more expensive, microprocessor. Thus, some prior art single microprocessor-controlled systems may be nearly as expensive as conventional systems having multiple microprocessors.
As yet another drawback, conventional control schemes used in multi-microprocessor controlled systems may not be suitable for single microprocessor-controlled system designs. In many prior art single microprocessor-controlled systems, signal distortion is a significant problem. Signal distortion associated with prior art single microprocessor-controlled systems is typically caused by either insufficient driving capability of the single system microprocessor, or by having too many devices connected to control bus lines. The signal distortion, in turn, reduces the reliability and stability of the system controls, which are vital in the overall performance of most consumer electronics products. Additionally, signal distortion will also limit the integration of subsystems with the single microprocessor-controlled device.
Thus, a need exists for a method and apparatus having a reduced number of system microprocessors in a device. A further need exists for a method and apparatus which meets the above-listed need and wherein the device does not impose prohibitively high driving requirements on the system microprocessor. Still another need exists for a method and apparatus which meets both of the above-listed needs and wherein the device does not suffer from severe signal distortion.
The present invention provides a method and apparatus having a reduced number of system microprocessors in a device. Additionally, the present invention provides a method and apparatus which achieves the above-listed accomplishment and wherein the device does not impose prohibitively high driving requirements on the system microprocessor. The present invention further provides a method and apparatus which achieves both of the above-listed accomplishments and wherein the device does not suffer from severe signal distortion.
In one embodiment, the present invention includes a single main system microprocessor. This embodiment further includes an impedance isolating expansion circuit. The single main system microprocessor and the impedance isolating expansion circuit are coupled together using a bus. In the present embodiment, a plurality of components are coupled to the impedance isolating expansion circuit such that the plurality of components are not directly connected to the bus and such that the plurality of components do not induce a direct impedance load on the bus. By prohibiting the components from inducing an impedance load on the bus, the present invention allows the single main system microprocessor to operate effectively and without severe signal distortion. In this embodiment, the bus has a plurality of second components coupled thereto. As a result, a single main system microprocessor is able to control operation of a device with reliability and stability even when the device includes numerous components.
In another embodiment, the present invention includes the features of the above-described embodiment and further recites that the bus used to couple the single main system microprocessor to the impedance isolating expansion circuit is an I2C bus. Similarly, other embodiments include the aforementioned features and recite that the first components are coupled to the impedance isolating expansion circuit using an I2C bus.
These and other advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the various drawing figures.